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  • 本科生招生
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    • Pavel V. Kustarev 

    ASSOCIATE PROFESSOR

    Master Supervisor

    Software Engineering and Computer Systems

    Systems on a Chip microarchitecture , Digital hardware design methods , Embedded systems architecture , Networked embedded systems , Networks and Communications , Cyber-Physical Systems design methods

    Email
    kustarev@corp.ifmo.ru
    Address
    St. Petersburg, Pr. Kronverkski 49, Room 471

    Education：

    1995-1999  Ph.D. Graduate Student. Department of Computer Science

    ITMO University, St. Petersburg, Russia

    Thesis advisor: Associate Professor Platunov A.E.

    Thesis: Design Methods for Small Distributed Systems of the Controllers

     

    1989-1995 Specialist Student. Department of Computer Science

    ITMO University, St. Petersburg, Russia

    Thesis advisor: Associate Professor Platunov A.E.

    Thesis: Microprocessor system for measuring of thermophysical parameters of materials

    Research Interests:

    • Systems on a Chip microarchitecture
    • Digital hardware design methods
    • Embedded systems architecture
    • Networked embedded systems
    • Networks and Communications
    • Cyber-Physical Systems design methods

    Diplomas Topics:

    1. Microprocessors and SoCs hardware microarchitecture specification and analysis
    2. Hardware accelerations for computer vision functionality
    3. Neuroprocessors (neuro-chips) hardware microarchitecture
    4. Configurable microprocessor instruction pipeline
    5. Network-on-chip for FPGA-based systems: microarchitecture and protocols
    6. Dynamic configuration of sensor’s mesh-networks
    7. Modelling of heterogeneous cyber-physical systems
    8. Design of application specific hardware accelerators (development project)
    9. System on a board design (development project)

    Professional Working Experiences:

    2015-present Head (Dean) of Faculty of Software Engineering and Computer Systems,

    ITMO University, St. Petersburg, Russia

     

    2000-present Associate Professor. Faculty of Software Engineering and Computer Systems,

    ITMO University, St. Petersburg, Russia

     

    1999-2000 Assistant Professor. Department of Computer Science,

    ITMO University, St. Petersburg, Russia

     

    1996-present Engineer, Senior Engineer (since 2000) and Vice Director (since 2006) of LMT Ltd. (Embedded Systems Design and Production), St. Petersburg, Russia

    Computer Skills:

    • Hardware Design Languages: Verilog/System Verilog, VHDL, System C
    • FPGA Design Tools: Xilinx ISE, Xilinx Vivado, Intel Quartus II, Modelsim
    • EDA Tools: Altium Designer, Cadence OrCAD, NI Multisim, etc.
    • Research/Modelling Tools: Ptolemy II, Matlab, LabView
    • Programming languages: Assemblers, C, C++, Perl, TCL
    • Embedded Software IDE: ARM Keil MDK, Microchip MPLAB, Atmel Design Studio, etc.
    • Operating Systems: Linux, Windows, Embedded OSs

    2019-present Development of methods for the creation and implementation of cyber-physical systems

     

    2018-2019      Development of a method and a computing mechanism for accelerated calculation of scene depth map in AR/VR-systems.

     

    2016-2018      Development of a multisensor 3D-vision robotic complex.

     

    2016-2018      Development of software-configured geographically distributed network for data centers protected by quantum technologies

     

    2017-2018 Development of methods for intelligent control of cyber-physical systems using quantum technologies

     

    2015-2018      Development of technology for constructing software-configurable quantum cryptographic networks

     

    2015-2017 Methods for designing key systems of information infrastructure

     

    2014-2014 Research of the mechanisms for the reliability of hardware-redundant information-measuring systems based on FPGA

     

    2013-2014 Organization of design solution space for embedded systems

     

    2010-present   Several projects for the development and production of embedded systems and cyber-physical systems for industrial, transportation and power-grid application

     

    Books 

    • O. Kluchev, P.V. Kustarev, A.E. Platunov. Distributed information and control systems – ITMO University, 2015 (in Russian)
    • O. Kluchev, P.V. Kustarev, A.E. Platunov. Hardware of embedded systems – ITMO University, 2015 (in Russian)

    Journal papers

    • Moltchanov D., Kustarev P., Koucheryavy Y.A. Analytical approximations for interference and SIR densities in terahertz systems with atmospheric absorption, directional antennas and blocking // Physical Communication – 2018, Vol. 26, pp. 21–30
    • Moltchanov D., Kustarev P., Kucheryavy Y. Analytical modeling and analysis of interleaving on correlated wireless channels // Computer Communications – 2018, Vol. 118, pp. 14-26
    • Maule M., Moltchanov D., Kustarev P., Komarov M., Andreev S., Koucheryavy Y. Delivering Fairness and QoS Guarantees for LTE/Wi-Fi Coexistence under LAA Operation // IEEE Access – 2018, Vol. 6, pp. 7359-7373
    • Petrov V., Moltchanov D., Komar M., Antonov A., Kustarev P., Rakheija S., Koucheryavy Y. Terahertz Band Intra-Chip Communications: Can Wireless Links Scale Modern x86 CPUs // IEEE Access – 2017, Vol. 5, pp. 6095-6109
    • Petrov V., Moltchanov D., Kustarev P., Jornet J.M., Koucheryavy Y.A. On the Use of Integral Geometry for Interference Modeling and Analysis in Wireless Networks // IEEE Communications Letters – 2016, Vol. 20, No. 12, pp. 2530-2533
    • Moltchanov D., Kluchev A., Kustarev P., Borunova K., Platunov A. Intra-CPU traffic estimation and implications on networks-on-chip research // Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) – 2016, Vol. 9870, pp. 453-464
    • Moltchanov D., Antonov A., Kluchev A., Borunova K., Kustarev P., Petrov V., Koucheryavy Y.A., Platunov A. Statistical Traffic Properties and Model Inference for Shared Cache Interface in Multi-Core CPUs // IEEE Access – 2016, Vol. 4, pp. 4829-4839
    • Antonov A.A., Kluchev A.O., Komar M.S., Kustarev P.V., Koucheryavy Ye.A., Moltchanov D.A., Petrov V.I., Platunov A.E. Applicability Centralized MAC protocol for hierarchical caching processors. Scientific and Technical Journal of Information Technologies, Mechanics and Optics, 2015, vol.15, no. 3, pp. 463–469. (in Russian)
    • Kluchev A., Kustarev P., Paltashev T., Platunov A. HLD-methodology application for reconfigurable embedded systems design. Scientific and Technical Journal of Information Technologies, Mechanics and Optics, 2014, vol.14, no.4, pp. 74-82. (in Russian)
    • Antonov A., Bykovsky S., Kustarev P. Transaction-level real-time constraints monitor for system on chip. Izvestiya vysshikh uchebnykh zavedeniy. Priborostroenie [Journal of Instrument Engineering]. 2014. V. 57. No. 4. P. 53-57. (in Russian)
    • Kustarev P., Bykovsky S. New approach for temperature measurements of field programmable gate arrays local area based on the Monte-Carlo method. Scientific and Technical Journal of Information Technologies, Mechanics and Optics, 2013, vol. 13, no. 6, pp. 86-92. (in Russian)

    Conferences papers

    • Antonov A.A., Kustarev P.V. DSL-based approach to hardware pipelines design // Proceedings of 17th International Multidisciplinary Scientific Geoconference SGEM 2017 – 2017, Vol. 17, No. 21, pp. 287-294
    • Bykovskii S., Kustarev P., Milin V., Antonov A. Model-driven runtime embedded monitoring for industrial controllers // Proceedings of The 13th IEEE International Symposium on Parallel and Distributed Processing with Applications. 2015. Vol. 1. No. 1. pp. 281-286.
    • Pinkevich V., Bikovsky S., Kustarev P. Functional monitoring of SoC with dynamic actualization of behavioral model // Proceedings of the 4th Mediterranean Conference on Embedded Computing (MECO 2015).
    • Kustarev P., Bikovsky S., Antonov A., Yanalov R. Process control and synchronization patterns for SOC // 14th International Multidisciplinary Scientific GeoConference SGEM 2014, Conference Proceedings.
    • Kustarev P., Bikovsky S., Pinkevich V. Hardware violation monitor of transaction level realtime constraints for reliable systems on a chip // 14th International Multidisciplinary Scientific GeoConference SGEM 2014, Conference Proceedings.